Optimised Hardware Implementation of AES for Improving Energy Efficiency of Low-Power Devices
Author:
Affiliation:
1. University of Kashmir,Department of Electronics & Instrumentation Technology,Srinagar,India
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10009016/10009051/10009468.pdf?arnumber=10009468
Reference19 articles.
1. High Speed and Low Power Implementation of AES for Wireless Sensor Networks
2. Energy-Efficient Design of 13attery-Powered Embedded Systems;benini,0
3. A comparative analysis of AES common modes of operation
4. Energy Efficiency Comparison with Cipher Strength of AES and Rijndael Cryptographic Algorithms in Mobile Devices;toldinas,2011
5. Energy Consumption Optimization in Internet of Things Applications: Concept and Techniques;barot;Int J Adv Sci Technol,2020
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