Technology Generic Delta-Sigma ADC Design with gm/ID Methodology
Author:
Affiliation:
1. Xiamen University,School of Electronic Science and Engineering,Xiamen,China
2. Tsinghua University,School of Integrated Circuits,Beijing 100084,China
Funder
Research and Development
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10424965/10425831/10426347.pdf?arnumber=10426347
Reference14 articles.
1. Ring amplifiers for switched-capacitor circuits
2. A 47.5MHz BW 4.7mW 67dB SNDR Ringamp Based Discrete-Time Delta Sigma ADC
3. 10.3 A Single-Channel 12b 2GS/s PVT-Robust Pipelined ADC with Critically Damped Ring Amplifier and Time-Domain Quantizer
4. A Fast Settling Low Noise Ring Amplifier for High Speed Pipelined SAR ADCs
5. A g/sub m//I/sub D/ based methodology for the design of CMOS analog circuits and its application to the synthesis of a silicon-on-insulator micropower OTA
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