Review of Hybrid Integration Techniques for Integrating III-V Onto Silicon-Reference-Cited by-同舟云学术

Review of Hybrid Integration Techniques for Integrating III-V Onto Silicon

Published:2023-05-10 Issue: Volume: Page:
ISSN:
Container-title:2023 IEEE International 3D Systems Integration Conference (3DIC)
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Author:

Masselink Erik W.¹,Stark Andrew¹,Yang Benjamin B.²,Harris T. Robert¹

Affiliation:

1. Electro-Optical Systems Laboratory,Atlanta,USA

2. Georgia Tech Research Institute,Cybersecurity, Information Protection, and Hardware Evaluation Research Laboratory,Atlanta,USA

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/10154896/10154899/10154923.pdf?arnumber=10154923

Reference27 articles.

1. A Novel Approach to Photonic Packaging Leveraging Existing High-Throughput Microelectronic Facilities

2. Wafer-Scale Hybrid Integration of InP DFB Lasers on Si Photonics by Flip-Chip Bonding With sub-300 nm Alignment Precision;marinins;IEEE Journal of Selected Topics in Quantum Electronics,2023

3. Self-Aligned Silicon Interposer Tiles and Silicon Bridges Using Positive Self-Alignment Structures and Rematable Me-chanically Flexible Interconnects;yang;IEEE Transactions on Components Packaging and Manufacturing Technology,2014

4. High Density and Low-Temperature Interconnection Enabled by Mechanical Self-Alignment and Electroless Plating; High Density and Low-Temperature Interconnection Enabled by Mechanical Self-Alignment and Electroless Plating;rajan;2019 International 3D Systems Integration Conference (3DIC),0

5. A Four-Channel Silicon Photonic Carrier with Flip-Chip Integrated Semiconductor Optical Amplifier (SOA) Array Providing 10-dB Gain;fuad;2016 IEEE 66th Electronic Components and Technology Conference (ECTC) ECTC,0