HASCO: Towards Agile HArdware and Software CO-design for Tensor Computation
Author:
Funder
Research and Development
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/9499716/9499722/09499796.pdf?arnumber=9499796
Cited by 46 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. Multi-Objective Hardware-Mapping Co-Optimisation for Multi-DNN Workloads on Chiplet-Based Accelerators;IEEE Transactions on Computers;2024-08
2. TensorMap: A Deep RL-Based Tensor Mapping Framework for Spatial Accelerators;IEEE Transactions on Computers;2024-08
3. Soter: Analytical Tensor-Architecture Modeling and Automatic Tensor Program Tuning for Spatial Accelerators;2024 ACM/IEEE 51st Annual International Symposium on Computer Architecture (ISCA);2024-06-29
4. Mind the Gap: Attainable Data Movement and Operational Intensity Bounds for Tensor Algorithms;2024 ACM/IEEE 51st Annual International Symposium on Computer Architecture (ISCA);2024-06-29
5. Minimum Cost Loop Nests for Contraction of a Sparse Tensor with a Tensor Network;Proceedings of the 36th ACM Symposium on Parallelism in Algorithms and Architectures;2024-06-17
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