Author:
Domingos Joao Mario,Neves Nuno,Roma Nuno,Tomas Pedro
Cited by
14 articles.
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1. Tartan: Microarchitecting a Robotic Processor;2024 ACM/IEEE 51st Annual International Symposium on Computer Architecture (ISCA);2024-06-29
2. Hardware Acceleration Method Using RISC-V Core with No ISA Extensions;2024 31st International Conference on Mixed Design of Integrated Circuits and System (MIXDES);2024-06-27
3. Using Source-to-Source to Target RISC-V Custom Extensions: UVE Case-Study;Proceedings of the 16th Workshop on Rapid Simulation and Performance Evaluation for Design;2024-01-18
4. A DSL and MLIR Dialect for Streaming and Vectorisation;Lecture Notes in Computer Science;2024
5. Sparse Stream Semantic Registers: A Lightweight ISA Extension Accelerating General Sparse Linear Algebra;IEEE Transactions on Parallel and Distributed Systems;2023-12