CODIC: A Low-Cost Substrate for Enabling Custom In-DRAM Functionalities and Optimizations

Author:

Orosa Lois,Wang Yaohua,Sadrosadati Mohammad,Kim Jeremie S.,Patel Minesh,Puddu Ivan,Luo Haocong,Razavi Kaveh,Gomez-Luna Juan,Hassan Hasan,Mansouri-Ghiasi Nika,Ghose Saugata,Mutlu Onur

Publisher

IEEE

Cited by 8 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. DRAM Bender: An Extensible and Versatile FPGA-Based Infrastructure to Easily Test State-of-the-Art DRAM Chips;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2023-12

2. Using Approximate DRAM for Enabling Energy-Efficient, High-Performance Deep Neural Network Inference;Embedded Machine Learning for Cyber-Physical, IoT, and Edge Computing;2023-10-01

3. AGNI: In-Situ, Iso-Latency Stochastic-to-Binary Number Conversion for In-DRAM Deep Learning;2023 24th International Symposium on Quality Electronic Design (ISQED);2023-04-05

4. FracDRAM: Fractional Values in Off-the-Shelf DRAM;2022 55th IEEE/ACM International Symposium on Microarchitecture (MICRO);2022-10

5. HiRA: Hidden Row Activation for Reducing Refresh Latency of Off-the-Shelf DRAM Chips;2022 55th IEEE/ACM International Symposium on Microarchitecture (MICRO);2022-10

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