Machine Learning Techniques for the Energy and Performance Improvement in Network-on-Chip (NoC)-Reference-Cited by-同舟云学术

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Machine Learning Techniques for the Energy and Performance Improvement in Network-on-Chip (NoC)

Published:2021-12-16 Issue: Volume: Page:
ISSN:
Container-title:2021 4th International Conference on Computing and Communications Technologies (ICCCT)
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Author:

RamaDevi J¹,Pathur Nisha S²,Karunakaran S³,Hemavathi S⁴,Majji Sankararao⁵,Shunmugam Anandaraj⁶

Affiliation:

1. PVP SIDDHARTHA Institute of Technology,CSE Department,Vijayawada,India

2. Nehru Institute of Technology,Department of CSE,Coimbatore,India

3. Vardhaman College of Engineering,Department of ECE,Hyderabad,India

4. Central Electrochemical Research Institute,Scientist Battery Division,Chennai,India

5. GRIET,Department of ECE,Hyderabad,India

6. School of CS & IT, DMI-St. John the Baptist University The Republic of Malawi,Central Africa

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/9711752/9711757/09711872.pdf?arnumber=9711872

Reference15 articles.

1. An Energy-Efficient Network-on-Chip Design using Reinforcement Learning

2. Performance and Energy Balanced Algorithm for Executing High Performance Computing Application

3. Performance and Energy Balanced Algorithm for Executing High Performance Computing Application

4. High-performance, energy-efficient, fault-tolerant network-on-chip design using reinforcement learning

5. Performance Evaluation of Application Mapping Approaches for Network-on-Chip Designs

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