An Efficient Architecture and High-Throughput Implementation of CCSDS-123.0-B-2 Hybrid Entropy Coder Targeting Space-Grade SRAM FPGA Technology-Reference-Cited by-同舟云学术

An Efficient Architecture and High-Throughput Implementation of CCSDS-123.0-B-2 Hybrid Entropy Coder Targeting Space-Grade SRAM FPGA Technology

Published:2022-12 Issue:6 Volume:58 Page:5470-5482
ISSN:0018-9251
Container-title:IEEE Transactions on Aerospace and Electronic Systems
language:
Short-container-title:IEEE Trans. Aerosp. Electron. Syst.

Author:

Chatziantoniou Panagiotis¹^ORCID,Tsigkanos Antonis¹^ORCID,Theodoropoulos Dimitris¹^ORCID,Kranitis Nektarios²^ORCID,Paschalis Antonis¹^ORCID

Affiliation:

1. Department of Informatics and Telecommunications, National and Kapodistrian University of Athens, Athens, Greece

2. Department of Aerospace Science and Technology, National and Kapodistrian University of Athens, Athens, Greece

Funder

H2020 European Institute of Innovation and Technology

Hellenic Foundation for Research and Innovation HFRI and the General Secretariat for Research and Technology GSRT

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Aerospace Engineering

Link

http://xplorestaging.ieee.org/ielx7/7/9970423/09772270.pdf?arnumber=9772270

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4. High-Performance COTS FPGA SoC for Parallel Hyperspectral Image Compression With CCSDS-123.0-B-1

5. Implementation of cloud detection and processing algorithms and CCSDS-compliant hyperspectral image compression for CHIME mission;barrios;Proc 7th Int Workshop On-Board Payload Data Compression,0

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