Author:
Khater Abdelmohsen. A.,Khairy Mohamed M.,Habib S. E.-D.
Cited by
7 articles.
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1. FPGA Realization of High-Efficient Address Generator Algorithm for WiMAX Deinterleaver;2024 IEEE 4th International Conference on VLSI Systems, Architecture, Technology and Applications (VLSI SATA);2024-05-17
2. FPGA Implementation Of Reconfigurable Address Generator For Various Standard Interleaver;2023 International Conference on Intelligent and Innovative Technologies in Computing, Electrical and Electronics (IITCEE);2023-01-27
3. New FPGA architecture for 8, 16 and 24 bit chaotic interleaver;2022 5th International Conference on Engineering Technology and its Applications (IICETA);2022-05-31
4. Design and Implementation of Shared Memory for Turbo and LDPC Code Interleaver;Wireless Communications and Mobile Computing;2022-02-27
5. Reconfigurable address generator for multi-standard interleaver;Microprocessors and Microsystems;2019-03