A heterogeneous SoC architecture with embedded virtual FPGA cores and runtime Core Fusion-Reference-Cited by-同舟云学术

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A heterogeneous SoC architecture with embedded virtual FPGA cores and runtime Core Fusion

Published:2011-06 Issue: Volume: Page:
ISSN:
Container-title:2011 NASA/ESA Conference on Adaptive Hardware and Systems (AHS)
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Author:

Figuli Peter,Hubner Michael,Girardey Romuald,Bapp Falco,Bruckschlogl Thomas,Thoma Florian,Henkel Jorg,Becker Jurgen

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx5/5949573/5963916/05963922.pdf?arnumber=5963922

Cited by 6 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. V-FPGAs: Increasing Performance with Manual Placement, Timing Extraction and Extended Timing Modeling;Journal of Signal Processing Systems;2022-07-05

2. Evaluation of Different Manual Placement Strategies to Ensure Uniformity of the V-FPGA;Applied Reconfigurable Computing. Architectures, Tools, and Applications;2021

3. Parameter Sensitivity in Virtual FPGA Architectures;Lecture Notes in Computer Science;2017

4. A Framework for Customizing Virtual 3-D Reconfigurable Platforms at Run-Time;2014 IEEE International Parallel & Distributed Processing Symposium Workshops;2014-05

5. Multi-objective module partitioning design for dynamic and partial reconfigurable system-on-chip using genetic algorithm;Journal of Systems Architecture;2014-01

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