Cryogenic-Aware Forward Body Biasing in Bulk CMOS
Author:
Affiliation:
1. Department of Quantum and Computing Engineering and QuTech, TU Delft, Delft, The Netherlands
2. Department of Microelectronics and QuTech, TU Delft, Delft, The Netherlands
Funder
Intel
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering,Electronic, Optical and Magnetic Materials
Link
http://xplorestaging.ieee.org/ielx7/55/10415514/10334493.pdf?arnumber=10334493
Reference19 articles.
1. Design and Characterization of a 28-nm Bulk-CMOS Cryogenic Quantum Controller Dissipating Less Than 2 mW at 3 K
2. A Fully Integrated Cryo-CMOS SoC for State Manipulation, Readout, and High-Speed Gate Pulsing of Spin Qubits
3. Cryo-CMOS Circuits and Systems for Quantum Computing Applications
4. CMOS Integrated Circuits for the Quantum Information Sciences
5. Characterization and Modeling of 28-nm Bulk CMOS Technology Down to 4.2 K
Cited by 2 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. A Benchmark of Cryo-CMOS Embedded SRAM/DRAMs in 40-nm CMOS;IEEE Journal of Solid-State Circuits;2024-07
2. Cryogenic Small Dimension Effects and Design-Oriented Scalable Compact Modeling of a 65-nm CMOS Technology;IEEE Journal of the Electron Devices Society;2024
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