Characterization of Noise in CMOS Ring Oscillators at Cryogenic Temperatures
Author:
Affiliation:
1. Department of Chemistry and Biochemistry, University of Maryland College Park (UMCP), College Park, MD, USA
2. NIST, Gaithersburg, MD, USA
3. Department of Electrical and Computer Engineering, University of California, Santa Barbara, CA, USA
Funder
Cooperative Research Agreement between the University of Maryland College Park (UMCP) and the National Institute of Standards and Technology (NIST), Physical Measurement Laboratory, through UMCP
U.S. Department of Commerce, NIST
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering,Electronic, Optical and Magnetic Materials
Link
https://ieeexplore.ieee.org/ielam/55/10230308/10179945-aam.pdf
Reference35 articles.
1. A 12-Bit Vernier Ring Time-to-Digital Converter in 0.13 $\mu{\hbox {m}}$ CMOS Technology
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3. A VCO-based analog-to-digital converter with second-order sigma-delta noise shaping;park;Proc IEEE Int Symp Circuits Syst,2009
4. Non-tunneling origin of the 1/f noise in SiC MOSFET
5. Cryogenic Characterization of 28-nm FD-SOI Ring Oscillators With Energy Efficiency Optimization
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