Energy-Efficiency Exploration of Memory Hierarchy using NVMs for HEVC Motion Estimation
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Publisher
IEEE
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http://xplorestaging.ieee.org/ielx7/8955687/8964633/08965050.pdf?arnumber=8965050
Cited by 4 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献
1. VVC decoder intra prediction using approximate storage: an error resilience evaluation;Analog Integrated Circuits and Signal Processing;2023-10-21
2. Error Resilience Evaluation of Approximate Storage in the Motion Compensation of VVC Decoders;2023 IEEE 14th Latin America Symposium on Circuits and Systems (LASCAS);2023-02-27
3. Error Resilience Evaluation of Approximate Storage in the Intra Prediction of VVC Decoders;2022 35th SBC/SBMicro/IEEE/ACM Symposium on Integrated Circuits and Systems Design (SBCCI);2022-08-22
4. An efficient highly parallelized ReRAM-based architecture for motion estimation of HEVC;Journal of Systems Architecture;2021-08
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