Compact CMOS-Compatible Majority Gate Using Body Biasing in FDSOI Technology-Reference-Cited by-同舟云学术

Compact CMOS-Compatible Majority Gate Using Body Biasing in FDSOI Technology

Published:2023-03 Issue:1 Volume:13 Page:86-95
ISSN:2156-3357
Container-title:IEEE Journal on Emerging and Selected Topics in Circuits and Systems
language:
Short-container-title:IEEE J. Emerg. Sel. Topics Circuits Syst.

Author:

de Abreu Brunno Alves¹^ORCID,Mema Albi²^ORCID,Thomann Simon²^ORCID,Paim Guilherme¹^ORCID,Flores Paulo³^ORCID,Bampi Sergio¹^ORCID,Amrouch Hussam²^ORCID

Affiliation:

1. Graduate Program in Microelectronics (PGMICRO), Institute of Informatics (INF), Universidade Federal do Rio Grande do Sul (UFRGS), Porto Alegre, Brazil

2. Chair for Semiconductor Test and Reliability (STAR), University of Stuttgart, Stuttgart, Germany

3. High-Performance Computing Architectures and Systems (HPCAS) of Instituto de Engenharia de Sistemas e Computadores-Investigação e Desenvolvimento (INESC-ID), Lisbon, Portugal

Funder

Deutsche Forschungsgemeinschaft

Coordena??o de Aperfei?oamento de Pessoal de N?vel Superior

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Link

http://xplorestaging.ieee.org/ielx7/5503868/10078357/10038679.pdf?arnumber=10038679

Reference16 articles.

1. Multi-$V_{T}$ UTBB FDSOI Device Architectures for Low-Power CMOS Circuit

2. Impact of back bias on ultra-thin body and BOX (UTBB) devices;liu;Symp VLSI Technol Dig Tech Papers,2011

3. Icarus verilog: Open-source verilog more than a year later;williams;Linux J,2002

4. The EPFL logic synthesis libraries;soeken;arXiv 1805 05121,2018

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