An Integrated Memory Array Processor Architecture for Embedded Image Recognition Systems
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Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx5/9793/30879/01431552.pdf?arnumber=1431552
Cited by 19 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. Compact 3-D-SRAM Memory With Concurrent Row and Column Data Access Capability Using Sequential Monolithic 3-D Integration;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2018-04
2. A Describing Method of an Image Processing Software in C for a High-Level Synthesis Considering a Function Chaining;IEICE Transactions on Information and Systems;2018
3. Image scrambling on a "mesh-of-tori" architecture;Scalable Computing: Practice and Experience;2014-04-30
4. A programmable computational image sensor for high-speed vision;SPIE Proceedings;2013-08-21
5. Real-Time Primary Image Processing;Applied Signal and Image Processing;2011
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