Design Analysis of 3-Bit Flash ADC using Low-Offset and Low-Power Opamp
Author:
Affiliation:
1. Institute of Engineering and Technology,Department of Electronics and Communication Engineering,Lucknow,India
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10115458/10115464/10116426.pdf?arnumber=10116426
Reference26 articles.
1. Design of novel multiplexer based thermometer to binary code encoder for 4 bit flash ADC
2. Low-Power Self Reconfigurable Multiplexer Based Decoder for Adaptive Resolution Flash ADCs
3. Comparator Design for Low Power High Speed Flash ADC-A Review
4. CMOS Schmitt-InverterBased Internal Reference Comparator Array for High Temperature Flash ADC;joseph;IETE J Res,2020
5. A novel power-efficient architecture for high-speed flash ADCs
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