CMOS analog divider and four-quadrant multiplier using pool circuits
Author:
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering
Link
http://xplorestaging.ieee.org/ielx1/4/9126/00406403.pdf?arnumber=406403
Cited by 11 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. A Low Voltage and Low Power Analog Multiplier;2023 IEEE Fifth International Conference on Advances in Electronics, Computers and Communications (ICAECC);2023-09-07
2. Four-Input One-Output Voltage-Mode Universal Filter Using Simple OTAs;Journal of Circuits, Systems and Computers;2019-05
3. Accurate Tunable-Gain 1/<i>x</i> Circuit Using Capacitor Charging Scheme;ETRI Journal;2015-10-01
4. Electronically tunable voltage-mode universal filter with single-input five-output using simple OTAs;International Journal of Electronics;2013-08
5. A new high speed and low power four-quadrant CMOS analog multiplier in current mode;AEU - International Journal of Electronics and Communications;2009-09
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