Efficient Designs for the 8-Bit Approximate Fixed Point Multiplication-Reference-Cited by-同舟云学术

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Efficient Designs for the 8-Bit Approximate Fixed Point Multiplication

Published:2024-01-08 Issue: Volume:322 Page:0336-0344
ISSN:
Container-title:2024 IEEE 14th Annual Computing and Communication Workshop and Conference (CCWC)
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Author:

Singh Kaptan¹,Puligilla Sai Varun¹,Ramesh Harshitha¹,Lnu Ankur¹,El-Razouk Hayssam¹

Affiliation:

1. California State University,Electrical and Computer Engineering,Fresno,CA,93740

Funder

California State University

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/10426790/10427556/10427674.pdf?arnumber=10427674

Reference19 articles.

1. Design of Ultra-Low Power Consumption Approximate 4–2 Compressors Based on the Compensation Characteristic

2. Design and Analysis of Approximate Compressors for Multiplication

3. The moduli space of polynomial maps and their fixed-point multipliers;Sugiyama,2017

4. Approximate compressors for error-resilient multiplier design

Cited by 1 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Efficient Approximate Adders for Fast Arithmetic in Energy-Saving Applications;2024 16th International Conference on Electronics, Computers and Artificial Intelligence (ECAI);2024-06-27

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