Effect of Parasitic Inductance Mismatch on Short-Circuit Characterization of Paralleled SiC MOSFETs
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Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/9089668/9092622/09092772.pdf?arnumber=9092772
Cited by 8 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献
1. Short Circuit Protection of Silicon Carbide MOSFETs: Challenges, Methods, and Prospects;IEEE Transactions on Power Electronics;2024-10
2. Measurements and Review of Failure Mechanisms and Reliability Constraints of 4H-SiC Power MOSFETs Under Short Circuit Events;IEEE Transactions on Device and Materials Reliability;2023-12
3. Analysis of SiC MOSFETs Short-Circuit behavior in Half Bridge Configuration during Shoot-Through Event;2023 IEEE Energy Conversion Congress and Exposition (ECCE);2023-10-29
4. Analysis and Mitigation of Short Circuit Current in Multichip Power Module with Paralleled SiC MOSFETs;2022 IEEE International Power Electronics and Application Conference and Exposition (PEAC);2022-11-04
5. Excellent Static and Dynamic Scaling of Power Handling Capability of the BaSIC(DMM) Topology with 1.2 kV SiC Power MOSFETs;2021 IEEE 8th Workshop on Wide Bandgap Power Devices and Applications (WiPDA);2021-11-07
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