Reliability analysis of CMOS inverter subjected to AC & DC NBTI stresses
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Publisher
IEEE
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http://xplorestaging.ieee.org/ielx7/7021862/7038563/07038602.pdf?arnumber=7038602
Cited by 4 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. Electrical Stress on the CMOS Inverters Made by Junctionless Gate-All-Around Transistors;IEEE Transactions on Electron Devices;2024-05
2. Investigation of Negative Bias Temperature Instability (NBTI) Effects on Standard Cell Library Circuits Performance;2019 IEEE Regional Symposium on Micro and Nanoelectronics (RSM);2019-08
3. Evaluation of mirror full adder circuit reliability performance due to negative bias temperature instability (NBTI) effects based on different defect mechanisms;AIP Conference Proceedings;2017
4. On the Circuit-Level Reliability Degradation Due to AC NBTI Stress;IEEE Transactions on Device and Materials Reliability;2016-09
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