1. Design and implementation of high performance and area efficient square architecture using Vedic Mathematics;naresh kumar reddy;Analog Integr Circ Sig Process,2019
2. An Efficient Application Core Mapping Algorithm for Wireless Network-an-Chip;reddy;IEEE Pacific Rim Int Symp Dependable Computing,2021
3. An energy-efficient fault-aware core mapping in mesh-based network on chip systems;kumar;Journal of Network and Computer Applications,2017
4. Communication Energy Constrained Spare Core on NoC;naresh kumar reddy;6th International Conference on Computing Communication and Networking Technologies (ICCCNT),2015
5. Machine Learning Techniques for the Prediction of NoC Core Mapping Performance