Author:
Sanabria-Borbon A.,Jayasankaran N. G.,Lee S.,Sanchez-Sinencio E.,Hu J.,Rajendran J.
Funder
National Science Foundation
Cited by
6 articles.
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1. Utilizing layout effects for analog logic locking;Journal of Cryptographic Engineering;2024-04-06
2. Anti-Piracy Design of RF Transceivers;IEEE Transactions on Circuits and Systems I: Regular Papers;2023-01
3. Leveraging Layout-based Effects for Locking Analog ICs;Proceedings of the 2022 Workshop on Attacks and Solutions in Hardware Security;2022-11-07
4. AI-Driven Assurance of Hardware IP against Reverse Engineering Attacks;2022 IEEE International Test Conference (ITC);2022-09
5. Analog/RF IP Protection: Attack Models, Defense Techniques, and Challenges;IEEE Transactions on Circuits and Systems II: Express Briefs;2021-01