An FPGA based HSR architecture for seamless PROFINET redundancy-Reference-Cited by-同舟云学术

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An FPGA based HSR architecture for seamless PROFINET redundancy

Published:2012-05 Issue: Volume: Page:
ISSN:
Container-title:2012 9th IEEE International Workshop on Factory Communication Systems
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Author:

Flatt Holger¹,Schriegel Sebastian¹,Neugarth Thimo¹,Jasperneite Jurgen¹

Affiliation:

1. Fraunhofer IOSB-INA, Application Center Industrial Automation, Langenbruch 6, 32657 Lemgo, Germany

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx5/6233683/6242527/06242555.pdf?arnumber=6242555

Cited by 4 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Half&Half: Intra-Flow Load Balancing and High Availability for Edge Cloud-enabled Manufacturing;2023 IEEE 28th International Conference on Emerging Technologies and Factory Automation (ETFA);2023-09-12

2. Cost Effective Computing Unit Redundancy in Networked Control Systems Using Real-Time Ethernet Protocol;Advances in Intelligent Systems and Computing;2018-08-29

3. Cyber-Physical Production System Gateway Based on a Programmable SoC Platform;IEEE Access;2017

4. Improvement of High-Availability Seamless Redundancy (HSR) Unicast Traffic Performance Using Enhanced Port Locking (EPL) Approach;IEICE Transactions on Information and Systems;2015

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