Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Computational Theory and Mathematics,Hardware and Architecture,Signal Processing
Cited by
43 articles.
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1. Optimizing VLIW Instruction Scheduling via a Two-Dimensional Constrained Dynamic Programming;ACM Transactions on Design Automation of Electronic Systems;2024-09-04
2. Scalable Heterogeneous Scheduling Based Model Parallelism for Real-Time Inference of Large-Scale Deep Neural Networks;IEEE Transactions on Emerging Topics in Computational Intelligence;2024-08
3. Efficient Multi-Processor Scheduling in Increasingly Realistic Models;Proceedings of the 36th ACM Symposium on Parallelism in Algorithms and Architectures;2024-06-17
4. Efficient Multi-Processor Scheduling in Increasingly Realistic Models (Brief Summary);2024 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW);2024-05-27
5. PIMLC: Logic Compiler for Bit-Serial Based PIM;2024 Design, Automation & Test in Europe Conference & Exhibition (DATE);2024-03-25