Funder
Fundación Séneca-Agencia de Ciencia y Tecnología de la Región de Murcia
Jóvenes Líderes en Investigación
MINECO
FEDER
Uppsala Programming for Multicore Architectures Research Center
Swedish VR
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Computational Theory and Mathematics,Hardware and Architecture,Signal Processing
Cited by
2 articles.
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1. CELLO: Compiler-Assisted Efficient Load-Load Ordering in Data-Race-Free Regions;2023 32nd International Conference on Parallel Architectures and Compilation Techniques (PACT);2023-10-21
2. VISU: A Simple and Efficient Cache Coherence Protocol Based on Self-updating;Algorithms and Architectures for Parallel Processing;2018