A Case Against Hardware Managed DRAM Caches for NVRAM Based Systems

Author:

Hildebrand Mark,Angeles Julian T.,Lowe-Power Jason,Akella Venkatesh

Funder

Intel Corporation

National Science Foundation

Publisher

IEEE

Cited by 7 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. CachedArrays: Optimizing Data Movement for Heterogeneous Memory Systems;2024 IEEE International Parallel and Distributed Processing Symposium (IPDPS);2024-05-27

2. MTM: Rethinking Memory Profiling and Migration for Multi-Tiered Large Memory;Proceedings of the Nineteenth European Conference on Computer Systems;2024-04-22

3. Bandwidth-Effective DRAM Cache for GPU s with Storage-Class Memory;2024 IEEE International Symposium on High-Performance Computer Architecture (HPCA);2024-03-02

4. Enabling Design Space Exploration of DRAM Caches for Emerging Memory Systems;2023 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS);2023-04

5. Efficient Large Scale DLRM Implementation on Heterogeneous Memory Systems;Lecture Notes in Computer Science;2023

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