Hardware Acceleration for Conditional State-Based Communication Scheduling on Real-Time Ethernet

Author:

Fischmeister Sebastian,Trausmuth Robert,Lee Insup

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Computer Science Applications,Information Systems,Control and Systems Engineering

Cited by 15 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. A Review of Recent Techniques in Mixed-Criticality Systems;Journal of Circuits, Systems and Computers;2019-06-27

2. Generation of fault-tolerant state-based communication schedules for real-time systems;EURASIP Journal on Embedded Systems;2017-10-26

3. A comprehensive embedded solution for data acquisition and communication using FPGA;Journal of Applied Research and Technology;2017-02

4. Evaluation of Communication Architectures for Switched Real-Time Ethernet;IEEE Transactions on Computers;2014-01

5. Atacama: An Open FPGA-Based Platform for Mixed-Criticality Communication in Multi-segmented Ethernet Networks;2013 IEEE 21st Annual International Symposium on Field-Programmable Custom Computing Machines;2013-04

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