An Open-Source RRAM Compiler
Author:
Affiliation:
1. Imperial College London,Department of Electrical and Electronic Engineering,UK,SW7 2BT
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/9841660/9841947/09842222.pdf?arnumber=9842222
Reference39 articles.
1. A ReRAM memory compiler for monolithic 3D integrated circuits in a carbon nanotube process;lee;ACM Journal on Emerging Technologies in Computing Systems (JETC),2021
2. Design and Optimization of Nonvolatile Multibit 1T1R Resistive RAM
3. A 0.7 V single-supply SRAM with 0.495 µm2 cell in 65 nm technology utilizing self-write-back sense amplifier and cascaded bit line scheme;kushida;IEEE JSSC,2009
4. Characterization of Dynamic SRAM Stability in 45 nm CMOS
5. Highly Energy-Efficient SRAM With Hierarchical Bit Line Charge-Sharing Method Using Non-Selected Bit Line Charges
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