High-and Low-Sides Asymmetric Deadtimes Generator for High-Efficiency Buck Converter Design
Author:
Affiliation:
1. Laval University,BioML-UL Lab.,Electrical and Computer Engineering Department,Quebec City,QC,Canada
2. Polytechnique Montreal,Polystim Neurotech. Lab.,Dept. of Electrical Engineering,QC,Canada
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/9841660/9841947/09842085.pdf?arnumber=9842085
Reference20 articles.
1. Building blocks for future dual-channel GaN gate drivers: Arbitrary waveform driver, bootstrap voltage supply, and level shifter
2. A 10MHz GaN Driver with Gate Ringing Suppression and Active Bootstrap Control
3. A 6.78-MHz Robust WPT System with Inductive Link Bandwidth Extended for cm-Sized Implantable Medical Devices
4. 16.7 A 20V 8.4W 20MHz four-phase GaN DC-DC converter with fully on-chip dual-SR bootstrapped GaN FET driver achieving 4ns constant propagation delay and 1ns switching rise time
5. A Wide-range Reconfigurable Deadtime and Delay Element for Optimal-Power Conversion
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