Active Wire Fences for Multitenant FPGAs
Author:
Affiliation:
1. EPFL,School of Computer and Communication Sciences,Lausanne,Switzerland
2. EPFL,Electrical and Electronics Engineering,Lausanne,Switzerland
Funder
National Science Foundation
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10139314/10138940/10138941.pdf?arnumber=10138941
Reference35 articles.
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1. Reliability and Security of AI Hardware;2024 IEEE European Test Symposium (ETS);2024-05-20
2. X-Attack 2.0: The Risk of Power Wasters and Satisfiability Don’t-Care Hardware Trojans to Shared Cloud FPGAs;IEEE Access;2024
3. Power and Frequency Intrinsic Channels on gem5;IEEE Transactions on Circuits and Systems I: Regular Papers;2024
4. A Visionary Look at the Security of Reconfigurable Cloud Computing;Proceedings of the IEEE;2023-12
5. Practical Implementations of Remote Power Side-Channel and Fault-Injection Attacks on Multitenant FPGAs;Security of FPGA-Accelerated Cloud Computing Environments;2023-09-18
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