An 8-ENOB Sampling-Rate Reconfigurable Asynchronous SAR ADC for Space Applications

Author:

Karim Rashid1,Grassi Marco1,Malcovati Piero1

Affiliation:

1. University of Pavia,Department of Electrical Computer, and Biomedical Engineering,Italy

Publisher

IEEE

Reference14 articles.

1. A Low-Power Pilot-DAC Based Column Parallel 8b SAR ADC With Forward Error Correction for CMOS Image Sensors

2. A 9 bit 34 MS/s SAR Analog-to-Digital Converter in 130 nm SiGe BiCMOS;digel;PRIME 2012 8th Conf on Ph D Research in Microelectr & Electronics,2012

3. A low power 8-bit successive approximation register A/D for a wireless body sensor node

4. A 2.5MS/s 225 ?W 8-bit Charge Redistribution SAR ADC for Multichannel Applications;piotr otfinowski;Proceedings of the 17th International Conference Mixed Design of Integrated Circuits and Systems - MIXDES 2010 MIXDES,2010

5. Determining the reliable minimum unit capacitance for the DAC capacitor array of SAR ADCs

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1. An 8 bit-ENOB Sampling-rate Reconfigurable Asynchronous SAR ADC with Metastability Watchdog Circuit for Activity-driven Multi-Channel CMOS Readout ASICs for Space Applications;AEU - International Journal of Electronics and Communications;2024-01

2. A 6b/8b Configurable High-Speed Asynchronous SAR ADC;2023 8th International Conference on Integrated Circuits and Microsystems (ICICM);2023-10-20

3. 1st-Order Error-Feedback Sampling-Rate Reconfigurable Noise-Shaping SAR ADC for Multi-Channel CMOS Front-End ASICs for Space Applications;2023 21st IEEE Interregional NEWCAS Conference (NEWCAS);2023-06-26

4. Reducing static linearity testing for ADCs;2023 IEEE 10th International Workshop on Metrology for AeroSpace (MetroAeroSpace);2023-06-19

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