Optimized FPGA Architecture for Machine Learning Applications using Posit Multipliers

Author:

Elsaid Kareem1,Safar Mona1,El-Kharashi M. Watheq1

Affiliation:

1. Ain Shams University,Computer and Systems Eng. Dept.,Cairo,Egypt

Publisher

IEEE

Reference24 articles.

1. Beating floating point at its own game: Posit arithmetic;gustafson;Supercomputing Frontiers and Innovations,2017

2. Reconfigurable acceleration for Monte Carlo based financial simulation

3. Revisiting ”what every computer scientist should know about floating-point arithmetic;lafage,2020

4. FPGA-based Monte Carlo Computation of Light Absorption for Photodynamic Cancer Therapy

5. The effect of LUT and cluster size on deep-submicron FPGA performance and density

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