Supports for Testing Memory Error Handling Code of In-memory Key Value Stores-Reference-Cited by-同舟云学术

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Supports for Testing Memory Error Handling Code of In-memory Key Value Stores

Published:2024-04-08 Issue: Volume: Page:41-48
ISSN:
Container-title:2024 19th European Dependable Computing Conference (EDCC)
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Author:

Nezu Naoya¹,Yamada Hiroshi¹

Affiliation:

1. TUAT,Tokyo,Japan

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/10533187/10533272/10533273.pdf?arnumber=10533273

Reference42 articles.

1. DRAM errors in the wild

2. A realistic evaluation of memory hardware errors and software system susceptibility;Li

3. Revisiting Memory Errors in Large-Scale Production Data Centers: Analysis and Modeling of New Trends from the Field

4. Mellow Writes: Extending Lifetime in Resistive Memories through Selective Slow Write Backs

5. Balancing Performance and Lifetime of MLC PCM by Using a Region Retention Monitor

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