Protective device for MOS integrated circuits-Reference-Cited by-同舟云学术

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Protective device for MOS integrated circuits

Published:1968 Issue:7 Volume:56 Page:1223-1224
ISSN:0018-9219
Container-title:Proceedings of the IEEE
language:
Short-container-title:Proc. IEEE

Author:

Iyer R.R.

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Link

http://xplorestaging.ieee.org/ielx5/5/31110/01448459.pdf?arnumber=1448459

Cited by 6 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Punch-through gate protection of M.O.S. devices;Microelectronics Reliability;1982-01

2. A model for the breakdown characteristics of p-channel MOS transistor protection devices;Solid-State Electronics;1981-06

3. Input protection of low-current DC amplifiers by GaAsP diodes;Journal of Physics E: Scientific Instruments;1981-04

4. C-MOS/SOS gate-protection networks;IEEE Transactions on Electron Devices;1978-08

5. Fet Technologies and Applications;Semiconducting Devices;1976

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