Author:
Papa David,Alpert Charles,Sze Cliff,Li Zhuo,Viswanathan Natarajan,Nam Gi-Joon,Markov Igor
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering,Hardware and Architecture,Software
Cited by
19 articles.
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1. CAUTS: Clock Tree Optimization via Skewed Cells With Complementary Asymmetrical Uniform Transistor Sizing;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2024-01
2. Investigating Machine Learning Applications for FDSOI MOS-Based Computer-Aided Design;2023 9th International Conference on Signal Processing and Communication (ICSC);2023-12-21
3. Soft-Clustering Driven Flip-flop Placement Targeting Clock-induced OCV;Proceedings of the 2020 International Symposium on Physical Design;2020-03-20
4. Timing-Driven and Placement-Aware Multibit Register Composition;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2019-08
5. Graceful Register Clustering by Effective Mean Shift Algorithm for Power and Timing Balancing;Proceedings of the 2019 International Symposium on Physical Design;2019-04-04