Optimization of Physical Failure Analysis Process to Minimize Transistors Degradation from Electron Beam for Advance Technology Nodes-Reference-Cited by-同舟云学术

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Optimization of Physical Failure Analysis Process to Minimize Transistors Degradation from Electron Beam for Advance Technology Nodes

Published:2023-07-24 Issue: Volume: Page:
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Container-title:2023 IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA)
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Author:

Chow Chi Eng¹,Goh Wai Ming¹,Zhu David¹,Chua Tze Ping¹,Yau Moi Kian¹,Chah Seng Hou¹,Marsook Muhamed Muzamil Riaz Muhamed¹,Sin Michelle Lai Pei¹,Indahwan Jony¹

Affiliation:

1. Qualcomm Global Trading Pte Ltd,Singapore,554910

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/10248978/10248979/10249041.pdf?arnumber=10249041

Reference12 articles.

1. 3MeV-Electron Beam Induced Threshold Voltage Shifts and Drain Current Degradation on ZVN3320FTA & ZVP3310FTA Commercial MOSFETs

2. Cu/Low-$k$ Interconnect Technology Design and Benchmarking for Future Technology Nodes

3. Electrical characterization of electron beam induced damage on sub-10 nm n-channel MOS transistors using nano-probing technique

4. Radiation damage in SiO2/Si induced by low‐energy electrons via plasmon excitation

5. Effects of electron-hole generation, transport and trapping in MOSFETs due to ?-ray exposure, Applied Radiation and Isotopes;soliman;IEEE Trans Nucl Sci,1995

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