An Empirical Network-on-Chip Topology Design for Multicore Architectures-Reference-Cited by-同舟云学术

An Empirical Network-on-Chip Topology Design for Multicore Architectures

Published:2021-11 Issue: Volume: Page:
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Container-title:2021 IEEE International Conference on Intelligent Systems, Smart and Green Technologies (ICISSGT)
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Author:

Dongre Sanskruti¹,Joshi Amit¹

Affiliation:

1. College of Engineering Pune, India,Department of Computer Engineering and IT,Pune,India

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/9718562/9719329/09719530.pdf?arnumber=9719530

Reference27 articles.

1. System simulation with gem5 and systemc: The keystone forfull interoperabil-ity;menard;2017 International Conference on Embedded Computer Systems Architectures Modeling and Simulation (SAMOS),0

2. Topology specialization for networks-on-chip in the dark silicon era;mehdi;Advances in Computers Elsevier 2018,0

3. Network on-chip and its research chal-lenges;paramasivam;OCP-IP,2015

4. Hierarchical clus-ter based noc de- signusing wireless interconnects for coherence support;shreedhar;29th International Conference on VLSI Design and 2016 15th International- Conference on Embedded Systems (VLSID),0

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