Author:
Chen Chen,Xiang Xiaoyan,Liu Chang,Shang Yunhai,Guo Ren,Liu Dongqi,Lu Yimin,Hao Ziyi,Luo Jiahui,Chen Zhijjan,Li Chunqiang,Pu Yu,Meng Jianyi,Yan Xiaolang,Xie Yuan,Qi Xiaoning
Cited by
8 articles.
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1. RVCE-FAL: A RISC-V Scalar-Vector Custom Extension for Faster FALCON Digital Signature;2024 Design, Automation & Test in Europe Conference & Exhibition (DATE);2024-03-25
2. Security Challenges Faced by RISC-V open-source Processors and its Security Features: A Survey;2023 25th International Multitopic Conference (INMIC);2023-11-17
3. Automatic Generation of Micro-kernels for Performance Portability of Matrix Multiplication on RISC-V Vector Processors;Proceedings of the SC '23 Workshops of The International Conference on High Performance Computing, Network, Storage, and Analysis;2023-11-12
4. RISC-V Instruction Set Architecture Extensions: A Survey;IEEE Access;2023
5. Soc Design of Intelligent Recognition Based on RISC-V;2022 International Conference on Automation, Robotics and Computer Engineering (ICARCE);2022-12-16