Author:
Troyanovsky B.,O'Halloran P.,Mierzwinski M.
Cited by
2 articles.
订阅此论文施引文献
订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. Why- and how- to integrate Verilog-A compact models in SPICE simulators;International Journal of Circuit Theory and Applications;2012-07-20
2. Compact modeling in Verilog-A;TRANSISTOR LEVEL MODELING FOR ANALOG/RF IC DESIGN;2006