Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Computational Theory and Mathematics,Hardware and Architecture,Theoretical Computer Science,Software
Cited by
111 articles.
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1. Fault-aware routing approach for mesh-based Network-on-Chip architecture;Integration;2023-11
2. SDT: A Low-cost and Topology-reconfigurable Testbed for Network Research;2023 IEEE International Conference on Cluster Computing (CLUSTER);2023-10-31
3. Fault-Tolerant Network-On-Chip;Built-in Fault-Tolerant Computing Paradigm for Resilient Large-Scale Chip Design;2023
4. Prime turn model and first last turn model: An adaptive deadlock free routing for network-on-chips;Microprocessors and Microsystems;2022-03
5. A Region-Tree Based Fault-tolerant Routing Algorithm for Network-on-Chip;2022 IEEE 2nd International Conference on Power, Electronics and Computer Applications (ICPECA);2022-01-21