Silicon Reliability Characterization of Intel’s Foveros 3D Integration Technology for Logic-on-Logic Die Stacking-Reference-Cited by-同舟云学术

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Silicon Reliability Characterization of Intel’s Foveros 3D Integration Technology for Logic-on-Logic Die Stacking

Published:2020-04 Issue: Volume: Page:
ISSN:
Container-title:2020 IEEE International Reliability Physics Symposium (IRPS)
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Author:

Prasad Chetan,Chugh Sunny,Greve Hannes,Ho I-chen,Kabir Enamul,Lin Cheyun,Maksud Mahjabin,Novak Steven R.,Orr Benjamin,Park Keun Woo,Schmitz Anthony,Zhang Zhizheng,Bai Peng,Ingerly Doug B.,Armagan Emre,Wu Hsinwei,Stover Patrick,Hibbeler Lance,O'Day Michael,Pantuso Daniel

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/9125439/9128217/09129277.pdf?arnumber=9129277

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