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An Extended Shared Logarithmic Unit for Nonlinear Function Kernel Acceleration in a 65-nm CMOS Multicore Cluster

  • Published:2017-01 Issue:1 Volume:52 Page:98-112
  • ISSN:0018-9200
  • Container-title:IEEE Journal of Solid-State Circuits
  • language:
  • Short-container-title:IEEE J. Solid-State Circuits

Author:

Gautschi MichaelORCID,Schaffner Michael,Gurkaynak Frank K.,Benini Luca

Funder

FP7 ERC Advance Project MULTITHERMAN

IcySoC Project, evaluated by the Swiss NSF and funded by Nano-Tera.ch with Swiss Confederation financing

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Cited by 7 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. A Reconfigurable Coprocessor for Simultaneous Localization and Mapping Algorithms in FPGA;IEEE Transactions on Circuits and Systems II: Express Briefs;2023-01

2. Optimized Hazard Free Pipelined Architecture Block for RV32I RISC-V Processor;2022 3rd International Conference on Smart Electronics and Communication (ICOSEC);2022-10-20

3. An Energy-Efficient Approximate Divider Based on Logarithmic Conversion and Piecewise Constant Approximation;IEEE Transactions on Circuits and Systems I: Regular Papers;2022-07

4. A High-Performance Core Micro-Architecture Based on RISC-V ISA for Low Power Applications;IEEE Transactions on Circuits and Systems II: Express Briefs;2021-06

5. Metrics, Noise Propagation Models, and Design Framework for Floating-Point Approximate Computing;IEEE Access;2021
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