A 25-Gb/s 2.2-W 65-nm CMOS Optical Transceiver Using a Power-Supply-Variation-Tolerant Analog Front End and Data-Format Conversion

Author:

Takemoto Takashi,Yamashita Hiroki,Yuki Fumio,Masuda Noboru,Toyoda Hidehiro,Chujo Norio,Lee Yong,Tsuji Shinji,Nishimura Shinji

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Cited by 26 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

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2. A 0.06 mm2, 0.9 pJ/bit, 25 Gb/s Optical Receiver Front-End Module in 65 nm CMOS;2024 13th International Conference on Communications, Circuits and Systems (ICCCAS);2024-05-10

3. A 25-Gb/s Active Feedback Transimpedance Amplifier in 65-nm CMOS;2024 International Conference on Electronics, Information, and Communication (ICEIC);2024-01-28

4. Low-Power, 25-Gb/s Active Voltage Current Feedback Transimpedance Amplifier in 65-nm CMOS;2024 International Conference on Electronics, Information, and Communication (ICEIC);2024-01-28

5. 30-Gbps/ch x 4 ch Simultaneous Error-Free Transmission with A Low-Power Transmitter Flip-Chip-Bonded 1.3-μm LD-Array-on-Si;2023 Optical Fiber Communications Conference and Exhibition (OFC);2023-03

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