A 100 MHz Ladder FeRAM Design With Capacitance-Coupled-Bitline (CCB) Cell-Reference-Cited by-同舟云学术

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A 100 MHz Ladder FeRAM Design With Capacitance-Coupled-Bitline (CCB) Cell

Published:2011-03 Issue:3 Volume:46 Page:681-689
ISSN:0018-9200
Container-title:IEEE Journal of Solid-State Circuits
language:
Short-container-title:IEEE J. Solid-State Circuits

Author:

Takashima Daisaburo,Nagadomi Yasushi,Ozaki Tohru

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Link

http://xplorestaging.ieee.org/ielx5/4/5718244/05682005.pdf?arnumber=5682005

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