A 50Gb/s CMOS Optical Receiver With Si-Photonics PD for High-Speed Low-Latency Chiplet I/O-Reference-Cited by-同舟云学术

A 50Gb/s CMOS Optical Receiver With Si-Photonics PD for High-Speed Low-Latency Chiplet I/O

Published:2023-11 Issue:11 Volume:70 Page:4271-4282
ISSN:1549-8328
Container-title:IEEE Transactions on Circuits and Systems I: Regular Papers
language:
Short-container-title:IEEE Trans. Circuits Syst. I

Author:

Chen Sikai¹^ORCID,You Mingyang¹^ORCID,Yang Yunqi¹,Jin Ye²,Lin Ziyi¹,Li Yihong¹,Li Leliang¹^ORCID,Li Guike¹^ORCID,Xie Yujun²,Zhang Zhao¹^ORCID,Wang Binhao³^ORCID,Tang Ningfeng⁴,Liu Faju⁴,Fang Zheyu⁵^ORCID,Liu Jian¹^ORCID,Wu Nanjian¹^ORCID,Chen Yong⁶^ORCID,Liu Liyuan¹^ORCID,Zhu Ninghua²^ORCID,Li Ming²^ORCID,Qi Nan¹^ORCID

Affiliation:

1. State Key Laboratory of Superlattices and Microstructures, Institute of Semiconductors, Chinese Academy of Sciences, Beijing, China

2. State Key Laboratory on Integrated Opto-electronics, Institute of Semiconductors, Chinese Academy of Sciences, Beijing, China

3. State Key Laboratory of Transient Optics and Photonics, Xi’an Institute of Optics and Precision Mechanics, Chinese Academy of Sciences, Xi’an, China

4. State Key Laboratory of Mobile Network and Mobile Multimedia Technology, Shenzhen, China

5. School of Physics, State Key Laboratory for Mesoscopic Physics, Collaborative Innovation Center of Quantum Matter, Peking University, Beijing, China

6. State Key Laboratory of Analog and Mixed-Signal VLSI, IME/ECE-FST, University of Macau, Taipa, China

Funder

National Key Research and Development Program of China

National Natural Science Foundation of China

Beijing Municipal Science and Technology Project

Chinese Academy of Sciences

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Hardware and Architecture

Link

http://xplorestaging.ieee.org/ielx7/8919/10296081/10256215.pdf?arnumber=10256215