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A 0.36-V 5-MS/s Time-Mode Flash ADC With Dickson-Charge-Pump-Based Comparators in 28-nm CMOS

  • Published:2020-06 Issue:6 Volume:67 Page:1789-1802
  • ISSN:1549-8328
  • Container-title:IEEE Transactions on Circuits and Systems I: Regular Papers
  • language:
  • Short-container-title:IEEE Trans. Circuits Syst. I

Author:

Esmailiyan AliORCID,Schembari FilippoORCID,Staszewski Robert BogdanORCID

Funder

Science Foundation Ireland

Marie Sklodowska-Curie Actions

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Cited by 27 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. A high‐speed and power efficient CMOS dynamic comparator for data converter circuits;International Journal of Numerical Modelling: Electronic Networks, Devices and Fields;2024-06-26

2. A 0.4 V 180 nm CMOS Sub-μW Ultra-Compact and Low-Effort Design PWM-Based ADC;2024 IEEE International Symposium on Circuits and Systems (ISCAS);2024-05-19

3. Behavioral Analysis of Regenerative and Dynamic Comparators in Terms of Speed and Thermal Reliability in Low-Power Applications;2024 IEEE 9th International Conference for Convergence in Technology (I2CT);2024-04-05

4. A Low-Power 4-Bit 20-MS/s Flash ADC in 65-nm CMOS with Rail-to-Rail Comparators;2024 Argentine Conference on Electronics (CAE);2024-03-07

5. A Low-Voltage Low-Power 20-Msps 3-Bit Rail-to-Rail Flash ADC;2024 IEEE 15th Latin America Symposium on Circuits and Systems (LASCAS);2024-02-27
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