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Neural Network Training With Stochastic Hardware Models and Software Abstractions

  • Published:2021-04 Issue:4 Volume:68 Page:1532-1542
  • ISSN:1549-8328
  • Container-title:IEEE Transactions on Circuits and Systems I: Regular Papers
  • language:
  • Short-container-title:IEEE Trans. Circuits Syst. I

Author:

Zhang Bonan,Chen Lung-Yen,Verma Naveen

Funder

Air Force Research Laboratory (AFRL) and Defense Advanced Research Projects Agency

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Cited by 9 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Characterization of a Femtojoule Voltage-to-Time Converter with Rectified Linear Unit Characteristic for Analog Neural Network Inference Accelerators;2024 IEEE 6th International Conference on AI Circuits and Systems (AICAS);2024-04-22

2. Training Neural Networks With In-Memory-Computing Hardware and Multi-Level Radix-4 Inputs;IEEE Transactions on Circuits and Systems I: Regular Papers;2024-04

3. Analog Multiply-Accumulate Cell With Multi-Bit Resolution for All-Analog AI Inference Accelerators;IEEE Transactions on Circuits and Systems I: Regular Papers;2023-09

4. Enhancing the Accuracy of Resistive In-Memory Architectures using Adaptive Signal Processing;ICASSP 2023 - 2023 IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP);2023-06-04

5. Low-Cost 7T-SRAM Compute-in-Memory Design Based on Bit-Line Charge-Sharing Based Analog-to-Digital Conversion;Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design;2022-10-30
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