Variation-Aware SRAM Cell Optimization Using Deep Neural Network-Based Sensitivity Analysis-Reference-Cited by-同舟云学术

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Variation-Aware SRAM Cell Optimization Using Deep Neural Network-Based Sensitivity Analysis

Published:2021-04 Issue:4 Volume:68 Page:1567-1577
ISSN:1549-8328
Container-title:IEEE Transactions on Circuits and Systems I: Regular Papers
language:
Short-container-title:IEEE Trans. Circuits Syst. I

Author:

Kwon Hyunjeong,Kim Daeyeon,Kim Young Hwan,Kang Seokhyeong

Funder

National Research Foundation of Korea

Korea government

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Link

http://xplorestaging.ieee.org/ielx7/8919/9371268/09345418.pdf?arnumber=9345418

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2. MA-Opt: Reinforcement Learning-Based Analog Circuit Optimization Using Multi-Actors;IEEE Transactions on Circuits and Systems I: Regular Papers;2024-05

3. Post-Layout Parasitic Capacitance Prediction Methodology Using Bayesian Optimization;2024 International Conference on Electronics, Information, and Communication (ICEIC);2024-01-28

4. Bayesian Learning Automated SRAM Circuit Design for Power and Performance Optimization;IEEE Transactions on Circuits and Systems I: Regular Papers;2023-12

5. SRP-YOLOX: An improved deep convolutional neural network for automated via detection;Microelectronics Reliability;2023-08

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