Lateral P-channel IGBT on SOI with Double Top RESURF Layers for Emitter Follower Type Complementary IGBT
Author:
Affiliation:
1. Waseda University,Graduate School of Information, Production and Systems,Kitakyushu,Japan
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/9813543/9813532/09813650.pdf?arnumber=9813650
Reference5 articles.
1. Over 1000 V n-ch LDMOSFET and p-ch LIGBT with JI RESURF structure and multiple floating field plate
2. Numerical analysis of short-circuit safe operating area for p-channel and n-channel IGBTs
3. Determination of Manufacturing Resurf Process Window for a Robust 700V Double Resurf LDMOS Transistor
4. The analysis and compensation of dead-time effects in PWM inverters
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1. Silicon-on-Insulator Lateral Insulated Gate Bipolar Transistor: Current Technologies and Prospects;IEEE Transactions on Electron Devices;2024-01
2. Novel Complementary Lateral IGBTs on Bulk Silicon with Multiple Buried Layers for Perfect Isolation and High Performance;2023 35th International Symposium on Power Semiconductor Devices and ICs (ISPSD);2023-05-28
3. Novel trench type complementary LIGBTs with common double drift layers for simple process and improvement in switching characteristics;2023 7th IEEE Electron Devices Technology & Manufacturing Conference (EDTM);2023-03-07
4. Novel trench type complementary LIGBTs with common double drift layers for simple process and improvement in switching characteristics;2023
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