Investigation of FPGA and SRAM Cells Under Radiation Exposure

Author:

Weide-Zaage Kirsten1,Paya-Vaya Guillermo2,Schmidt Katharina3,Hagenah Dorian3

Affiliation:

1. RESRI Group, Institute of Microelectronic Systems (IMS), Leibniz Universität Hannover,Hannover,Germany

2. Chair for Chip Design for Embedded Computing, Technische Universität Braunschweig,Germany

3. Bundeswehr Research Institute for Protective Technologies and NBC Protection (WIS),Munster,Germany

Publisher

IEEE

Reference9 articles.

1. A multi-layer SEU mitigation strategy to improve FPGA design robustness for the ATLAS muon spectrometer upgrade

2. On the Critical of Caches in Fault-Tolerant Processors for Space;di mascio;IEEE,2019

3. Techniques for radiation effects mitigation in ASICs and FPGAs handbook;CSS-Q-HB-60-02A,2016

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1. Evaluation of Resource-Efficient Crater Detectors on Embedded Systems;IGARSS 2024 - 2024 IEEE International Geoscience and Remote Sensing Symposium;2024-07-07

2. A Probability Soft-Error Model for a 28-nm SRAM-based FPGA under Neutron Radiation Exposure;2023 24th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems (EuroSimE);2023-04-17

3. Revisiting 3D-X-ray for Rapid Reverse Engineering in Large Electronic Packages and PCBs;2022 IEEE Physical Assurance and Inspection of Electronics (PAINE);2022-10-25

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